1. Field of the Invention
The present invention relates to the technical field of data protection for a processor and, more particularly, to a device of applying protection bit codes to encrypt a program for protection.
2. Description of Related Art
Due to the importance of intellectual properties, manufactories typically encrypt their intellectual property (IP) related programs off-line for protection and store the programs encrypted in a non-volatile memory or storage medium, such that an unauthorized person cannot restore the data even if he/she obtains the memory or storage medium with the programs encrypted, thereby achieving protection purpose.
U.S. Pat. No. 6,408,073 granted to Hsu, et al. for an “Scramble circuit to protect data in a read only memory” discloses a scramble circuit for protecting data stored in a read only memory (ROM) by applying both a pseudo-random generator and an initial value seed1/seed2 to code ROM data and thus generates encoded data. However, since the scrambling technology uses random numbers as parameters, such a data protection method requires a synchronous random generator for decoding. It also needs many patterns of random numbers to effectively prevent an unauthorized person from retrieving the programs encrypted, which means that a pseudo random generator for encoding and decoding needs highly complicated circuitry. Thus, the cost increases much. On the contrary a simpler pseudo random generator for encoding and decoding can be used to save the cost. In this way, programs encrypted can be retrieved by an unauthorized person easily.
Therefore, it is desirable to provide an improved device and method to mitigate and/or obviate the aforementioned problems.